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Digital IC Design Engineer Featured

Huntington Beach, CA

Compiler, ICC2, StarRC, PrimeTime, Tetramax, Formality; Cadence Genus, Innovus, Conformal, Joules, JASPERGold; Mentor Graphics Questa, Tessent; Xilinx Vivado; and Universal Verification Methodology (UVM) Experience working on large-scale SoC design teams. Experience developing digital ASICs and SoCs in state-of-the-art semiconductor fabrication processes (e.g. 7/10/12/14/16nm FinFET CMOS, 22nm FDSOI CMOS) Experience developing digital or analog/mixed-signal ICs for extreme environment applications (e.g. radiation-hardened, extreme low/high temperatures, ultra-long li
2022-11-23

Digital IC Design Engineer Featured

Huntington Beach, CA

Compiler, ICC2, StarRC, PrimeTime, Tetramax, Formality; Cadence Genus, Innovus, Conformal, Joules, JASPERGold; Mentor Graphics Questa, Tessent; Xilinx Vivado; and Universal Verification Methodology (UVM) Experience working on large-scale SoC design teams. Experience developing digital ASICs and SoCs in state-of-the-art semiconductor fabrication processes (e.g. 7/10/12/14/16nm FinFET CMOS, 22nm FDSOI CMOS) Experience developing digital or analog/mixed-signal ICs for extreme environment applications (e.g. radiation-hardened, extreme low/high temperatures, ultra-long li
2022-11-23

MID Level Microelectronics Digital... Featured

El Segundo, CA

Compiler, ICC2, StarRC, PrimeTime, Tetramax, Formality; Cadence Genus, Innovus, Conformal, Joules, JASPERGold; Mentor Graphics Questa, Tessent; Xilinx Vivado; and Universal Verification Methodology (UVM) Experience working on large-scale SoC design teams. Experience developing digital ASICs and SoCs in state-of-the-art semiconductor fabrication processes (e.g. 7/10/12/14/16nm FinFET CMOS, 22nm FDSOI CMOS) Experience developing digital or analog/mixed-signal ICs for extreme environment applications (e.g. radiation-hardened, extreme
2022-11-23

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2022-11-28

Public search utility limited to 10 most recent results. Please sign in or register to view all search results & apply.